About Us

The Center for Integrated Circuit and Device Research (CIDR)

CIDR is a DOST-funded infrastructure and framework for the sharing of resources between the academe, industry, and government, with the goal of reducing the risk of bringing new technologies from discovery to commercialization. Specifically, sharing resources that enable (1) graduate-level manpower development, (2) technology exploration, and (3) increased technology absorption capabilities, leading to increased economic competitiveness and a sustainable local IC design ecosystem. In order to enable these goals and address the accompanying issues associated with these goals, CIDR’s efforts will revolve around and emphasize collaborative activities, specifically joint development of manpower and technologies.

2022-2025

This component project of the CIDR aims to explore asymmetric radio frequency (RF) circuit topologies and system architectures for very low-power wireless sensor nodes running purely on harvested energy. By combining impulse radio (IR) ultra-wideband (UWB) transmitters (Tx) with on-off keying (OOK) energy detection receivers (Rx), we expect significant reduction in the overall energy requirements of the entire radio front-end transceiver (TxRx). This would potentially enable a wide variety of sensor and internet-of-things (IoT) applications in severely energy-starved environments.

This component project of the CIDR program explores the interaction between MEMS-based sensors and their corresponding interface circuits, as well as formulates an effective way of co-designing and co-simulating both technologies. This will pave the way in understanding the tradeoffs that exist among the elements in such a system prior to actual sensor fabrication or interface circuit design. Through this project, analytical and behavioral models of MEMS sensors and interface circuits can be developed. Analysis on how the system will perform using these models through co-design methodologies of both the sensors and interface circuits can help optimize energy efficiency, enable faster functional verification of the system, reduce development cycle, and improve the accuracy of the system design.

This component project of the CIDR program tackles the co-design of energy-efficient machine learning algorithms and hardware. Methodologies to integrate machine learning on-chip for distributed data processing, network lifespan improvement and security will be explored. These methodologies will likewise pave the way for automated hardware generation for the accelerator needed to perform these tasks.

This component project of the CIDR program explores a battery-less IoT device through multiple energy harvesting technologies. The environmental, economic, and logistical issue of battery replacement in the deployment of millions of IoT devices can be solved by utilizing super-cap instead of batteries. One possible solution for realizing these battery-less IoT devices is through multiple energy harvesting with design optimization of the circuit power consumption. Moreover, this project aimed to develop a customize and reconfigurable power management integrated circuit (IC) designed chip with different energy harvesting technologies; a combined or stand-alone energy harvesting unit (e.g., light, thermal, and RF sources), depending on the application of the wireless sensor node (WSN) or IoT device.

2025-2028 Proposals

This component project of the CIDR explores the design and optimization of Energy-Detection (ED) Impulse-Radio (IR) Ultra-Wideband (UWB) transceivers for very low-power wireless sensor nodes running purely on harvested energy. This would potentially enable a wide variety of (1) large-scale environmental and (2) implanted biomedical sensor nodes and networks in severely energy-starved conditions and locales. 

The project has three main phases: (1) the development of system and circuit models, (2) the design, implementation, and verification of key IR-UWB building blocks, and (3) the design, implementation, and verification of two proof-of-concept 6.5GHz-8GHz IR-UWB transceivers – one for large-scale environmental sensor nodes, and another for implanted biomedical sensor nodes, all in 22nm fully-depleted silicon-on-insulator (FDSOI) CMOS technology.

Microfluidic chips that integrate both microfluidic and MEMS-based structures present a compelling solution for real-time, miniaturized, and energy-efficient environmental monitoring. To enhance their utility and enable more complex systems, these devices can be combined with chip-level sensing and processing circuits tailored to detect specific environmental parameters. Building on insights from Project 2, this component project of the CIDR program focuses on the integration of microfluidic and MEMS-based structures with their corresponding readout electronics through model-driven design approaches. Our goal is to develop a systematic methodology for co-designing these components. 

On the microfluidic side, we will explore various substrate materials, two fluid flow regimes based on different propulsion forces, and a range of actuation mechanisms. For the MEMS components, we will leverage existing work on piezoelectric pressure sensors, thermopile-based temperature sensors, and surface acoustic wave (SAW) temperature sensors. The modeling, characterization, and design techniques developed in the ongoing CIDR project will be applied and adapted where appropriate. Ultimately, this research aims to establish a comprehensive, model-driven design framework that enhances sensitivity, selectivity, and energy efficiency in integrated microfluidic sensing systems.

As sensors become increasingly pervasive, the goal is to develop zero-maintenance, energy-independent sensor nodes for large-scale systems. These nodes must operate in low-voltage conditions to minimize energy consumption, which introduces performance variability due to environmental factors and manufacturing inconsistencies. This variability can lead to timing violations and computational errors, impacting the reliability of data used for critical decisions. To increase resiliency against these errors, redundant computation techniques are commonly used. However, these significantly increase power consumption and physical size, which is not ideal for energy-constrained sensor nodes. Therefore, there is a need to explore where resiliency can be introduced with minimal power and area cost. This project explores various levels of abstraction where resiliency can be applied. These resiliency techniques can be applied at the circuit/transistor level, architecture level, and even at the software/algorithm level. The objective of this project is to develop design methodologies for incorporating resiliency in computing architectures targeted for sensor nodes. A fully integrated, low-voltage, low-energy 22nm sensor node prototype will be developed to enable measurements and demonstrate the efficacy of the resiliency techniques that were applied.

This component project of the Center for Integrated Circuit Devices and Research (CIDR) explores the use of artificial intelligence techniques in the compensation of circuit performance variations due to the effects of voltage supply instability, temperature variations, manufacturing process variability, and internal leakage of small transistors. When proven, this strategy can be used by different circuit designers and other IC design establishments to increase the manufacturing yields. 

The project has three phases: (1) the design of the on-chip sensors that can detect the four varying parameters, (2) implementation of the test chip that contains the sensors and a controllable oscillator and voltage reference circuit, and (3) the modeling of the test chip to create an AI model that can be used as a feedback mechanism to maintain the performance of the oscillator and reference circuit. This will all be implemented using the 22-nm Fully depleted Silicon on Insulator (FD-SOI) process.

The miniaturization and growing use of MEMS-based sensors in Internet of Things (IoT) and AI applications necessitate efficient on-chip energy storage solutions. While energy harvesters can provide power, conventional capacitors on PCB lack the energy density needed for these low-power devices. This project addresses the need for more efficient energy storage in microsystems by fabricating a suitable microsupercapacitor device based on pseudocapacitive materials by utilizing microfabrication techniques, and vacuum and electrochemical deposition techniques. These miniaturized energy storage devices will utilize pseudocapacitive materials for higher capacitance and stability and easier integration in existing microfabrication techniques. The research has four main objectives: 1) to characterize fabrication steps for candidate materials using vacuum and electrochemical deposition techniques, 2) to create a fabrication plan based on the characterization results, 3) to fabricate a microsupercapacitor device via microfabrication techniques, and 4) to test and characterize the fabricated device. This project serves as a cornerstone initiative in fostering a local critical mass of researchers actively engaged in microelectronic fabrication. By successfully demonstrating microsupercapacitor development, the local industry can be propelled towards the forefront of microelectronic design and fabrication, strengthening the Philippines’ position within the global microelectronics market by showcasing domestic expertise in advanced device development.

The Bangsamoro Autonomous Region in Muslim Mindanao (BARMM) is facing a severe energy crisis characterized by low electrification, high system losses, and financially struggling electric cooperatives, further compounded by widespread issues with traditional metering and a lack of consumer trust. This project proposes a novel solution: the design and deployment of advanced smart meters incorporating embedded machine learning based on hyperdimensional computing (HDC). This approach, targeting residential and public buildings within and around MSU-Marawi as an initial pilot, aims to provide real-time, itemized energy consumption data to empower consumers, enhance transparency, and improve billing accuracy, thereby fostering trust and enabling energy efficiency. The project’s core objectives include investigating and validating HDC for smart meter load pattern recognition, evaluating the feasibility of implementing HDC algorithms in ASICs for real-world deployment, and developing and testing a proof-of-concept FPGA-based smart meter system utilizing HDC. By integrating machine learning directly onto the meters for edge computing, this project differentiates itself from conventional smart meter systems and promises benefits such as reduced energy costs for consumers and MSU-Marawi, improved energy management, capacity building in microelectronics at MSU-Marawi, and the potential for wider adoption across BARMM, contributing to a more reliable and efficient energy sector in the region.